simulavr  1.1.0
attiny25_45_85.cpp
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1 /*
2  ****************************************************************************
3  *
4  * simulavr - A simulator for the Atmel AVR family of microcontrollers.
5  * Copyright (C) 2001, 2002, 2003 Klaus Rudolph
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20  *
21  ****************************************************************************
22  *
23  * $Id$
24  */
25 
26 #include "attiny25_45_85.h"
27 
28 #include "hardware.h"
29 #include "irqsystem.h"
30 #include "hwport.h"
31 #include "hwstack.h"
32 #include "hweeprom.h"
33 #include "hwwado.h"
34 #include "hwsreg.h"
35 #include "flashprog.h"
36 
37 #include "avrfactory.h"
38 
42 
44  // destroy subsystems in reverse order, you've created it in constructor
45  delete usi;
46  delete acomp;
47  delete ad;
48  delete aref;
49  delete admux;
50  delete timer1;
51  delete pllcsr_reg;
52  delete timer0;
53  delete timer01irq;
54  delete extirq;
55  delete pcmsk_reg;
56  delete mcucr_reg;
57  delete gifr_reg;
58  delete gimsk_reg;
59  delete gpior2_reg;
60  delete gpior1_reg;
61  delete gpior0_reg;
62  delete osccal_reg;
63  delete clkpr_reg;
64  delete stack;
65  delete eeprom;
66  delete irqSystem;
67  delete spmRegister;
68 }
69 
71  unsigned flash_bytes,
72  unsigned ee_bytes):
73  AvrDevice(64 , // I/O space above General Purpose Registers
74  ram_bytes, // RAM size
75  0, // External RAM size
76  flash_bytes), // Flash Size
77  portb(this, "B", true, 6),
78  gtccr_reg(&coreTraceGroup, "GTCCR"),
79  prescaler0(this, "0", &gtccr_reg, 0, 7),
80  premux0(&prescaler0, PinAtPort(&portb, 2))
81 {
82  flagJMPInstructions = false;
83  flagMULInstructions = false;
84  fuses->SetFuseConfiguration(17, 0xffdf62);
85  if(flash_bytes > 2U * 1024U)
87  else
89  irqSystem = new HWIrqSystem(this, 2, 15); // 2 bytes per vector, 15 vectors
90  eeprom = new HWEeprom(this, irqSystem, ee_bytes, 6, HWEeprom::DEVMODE_EXTENDED);
91  //initialize stack: size=8,9,10 bit and init to RAMEND
92  int stack_size = 8;
93  if(ram_bytes > 128U) {
94  if(ram_bytes > 256U)
95  stack_size = 10;
96  else
97  stack_size = 9;
98  }
99  stack = new HWStackSram(this, stack_size, true);
100  clkpr_reg = new CLKPRRegister(this, &coreTraceGroup);
102 
103  gpior0_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR0");
104  gpior1_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR1");
105  gpior2_reg = new GPIORegister(this, &coreTraceGroup, "GPIOR2");
106 
107  gimsk_reg = new IOSpecialReg(&coreTraceGroup, "GIMSK");
108  gifr_reg = new IOSpecialReg(&coreTraceGroup, "GIFR");
109  mcucr_reg = new IOSpecialReg(&coreTraceGroup, "MCUCR");
110  pcmsk_reg = new IOSpecialReg(&coreTraceGroup, "PCMSK");
112  extirq->registerIrq(1, 6, new ExternalIRQSingle(mcucr_reg, 0, 2, GetPin("B2")));
114 
116  timer01irq->registerLine(1, IRQLine("TOV0", 5));
117  timer01irq->registerLine(2, IRQLine("TOV1", 4));
118  timer01irq->registerLine(3, IRQLine("OCF0B", 11));
119  timer01irq->registerLine(4, IRQLine("OCF0A", 10));
120  timer01irq->registerLine(5, IRQLine("OCF1B", 9));
121  timer01irq->registerLine(6, IRQLine("OCF1A", 3));
122 
123  timer0 = new HWTimer8_2C(this,
124  &premux0,
125  0,
126  timer01irq->getLine("TOV0"),
127  timer01irq->getLine("OCF0A"),
128  PinAtPort(&portb, 0),
129  timer01irq->getLine("OCF0B"),
130  PinAtPort(&portb, 1));
131 
132  // PLLCSR register and timer 1
133  pllcsr_reg = new IOSpecialReg(&coreTraceGroup, "PLLCSR");
134  timer1 = new HWTimerTinyX5(this,
135  &gtccr_reg,
136  pllcsr_reg,
137  timer01irq->getLine("TOV1"),
138  timer01irq->getLine("OCF1A"),
139  PinAtPort(&portb, 1),
140  PinAtPort(&portb, 0),
141  timer01irq->getLine("OCF1B"),
142  PinAtPort(&portb, 4),
143  PinAtPort(&portb, 3));
144 
145  // ADC
146  admux = new HWAdmuxT25(this, &portb.GetPin(5), &portb.GetPin(2), &portb.GetPin(4), &portb.GetPin(3));
147  aref = new HWARef8(this, &portb.GetPin(0));
148  ad = new HWAd(this, HWAd::AD_T25, irqSystem, 8, admux, aref);
149 
150  // Analog comparator
151  acomp = new HWAcomp(this, irqSystem, PinAtPort(&portb, 0), PinAtPort(&portb, 1), 7, ad, NULL);
152 
153  // USI
154  usi = new HWUSI_BR(this, irqSystem, PinAtPort(&portb, 0), PinAtPort(&portb, 1), PinAtPort(&portb, 2), 13, 14);
156 
157  // IO register set
158  rw[0x5f]= statusRegister;
159  rw[0x5e]= & ((HWStackSram *)stack)->sph_reg;
160  rw[0x5d]= & ((HWStackSram *)stack)->spl_reg;
161  //rw[0x5c] reserved
162  rw[0x5b]= gimsk_reg;
163  rw[0x5a]= gifr_reg;
164  rw[0x59]= & timer01irq->timsk_reg;
165  rw[0x58]= & timer01irq->tifr_reg;
166  rw[0x57]= & spmRegister->spmcr_reg;
167  //rw[0x56] reserved
168  rw[0x55]= mcucr_reg;
169  //rw[0x54] reserved
170  rw[0x53]= & timer0->tccrb_reg;
171  rw[0x52]= & timer0->tcnt_reg;
172  rw[0x51]= osccal_reg;
173  rw[0x50]= & timer1->tccr_reg;
174 
175  rw[0x4f]= & timer1->tcnt_reg;
176  rw[0x4e]= & timer1->tocra_reg;
177  rw[0x4d]= & timer1->tocrc_reg;
178  rw[0x4c]= & gtccr_reg;
179  rw[0x4b]= & timer1->tocrb_reg;
180  rw[0x4a]= & timer0->tccra_reg;
181  rw[0x49]= & timer0->ocra_reg;
182  rw[0x48]= & timer0->ocrb_reg;
183  rw[0x47]= pllcsr_reg;
184  rw[0x46]= clkpr_reg;
185  rw[0x45]= & timer1->dt1a_reg;
186  rw[0x44]= & timer1->dt1b_reg;
187  rw[0x43]= & timer1->dtps1_reg;
188  //rw[0x42] reserved
189  //rw[0x41] reserved
190  //rw[0x40] reserved
191 
192  rw[0x3f]= & eeprom->eearh_reg;
193  rw[0x3e]= & eeprom->eearl_reg;
194  rw[0x3d]= & eeprom->eedr_reg;
195  rw[0x3c]= & eeprom->eecr_reg;
196  //rw[0x3b] reserved
197  //rw[0x3a] reserved
198  //rw[0x39] reserved
199  rw[0x38]= & portb.port_reg;
200  rw[0x37]= & portb.ddr_reg;
201  rw[0x36]= & portb.pin_reg;
202  rw[0x35]= pcmsk_reg;
203  //rw[0x34] reserved
204  rw[0x33]= gpior2_reg;
205  rw[0x32]= gpior1_reg;
206  rw[0x31]= gpior0_reg;
207  rw[0x30]= &usi->usibr_reg;
208 
209  rw[0x2f]= &usi->usidr_reg;
210  rw[0x2e]= &usi->usisr_reg;
211  rw[0x2d]= &usi->usicr_reg;
212  //rw[0x2c] reserved
213  //rw[0x2b] reserved
214  //rw[0x2a] reserved
215  //rw[0x29] reserved
216  rw[0x28]= &acomp->acsr_reg;
217  rw[0x27]= &ad->admux_reg;
218  rw[0x26]= &ad->adcsra_reg;
219  rw[0x25]= &ad->adch_reg;
220  rw[0x24]= &ad->adcl_reg;
221  rw[0x23]= &ad->adcsrb_reg;
222  //rw[0x22] reserved
223  //rw[0x21] reserved
224  //rw[0x20] reserved
225 
226  Reset();
227 }
228 
229 /* EOF */
230 
Basic AVR device, contains the core functionality.
Definition: avrdevice.h:66
IOSpecialReg gtccr_reg
GTCCR IO register.
AvrFuses * fuses
Definition: avrdevice.h:100
PrescalerMultiplexerExt premux0
prescaler multiplexer for timer 0
HWIrqSystem * irqSystem
Definition: avrdevice.h:104
IOSpecialReg * mcucr_reg
MCUCR IO register.
IOReg< HWUSI > usicr_reg
Definition: hwusi.h:168
OSCCALRegister * osccal_reg
OSCCAL IO register.
ADC reference is selected on 4 diff. sources: Vcc, aref pin, bandgap or 2.56V reference.
Definition: hwad.h:78
Implements a stack with stack register using RAM as stackarea.
Definition: hwstack.h:131
IOReg< HWEeprom > eedr_reg
Definition: hweeprom.h:101
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
Definition: externalirq.cpp:53
Implement CLKPR register.
Definition: rwmem.h:135
bool flagJMPInstructions
CALL and JMP instructions are available (only on devices with bigger flash)
Definition: avrdevice.h:116
Pin & GetPin(unsigned char pinNo)
returns a pin reference of pin with pin number
Definition: hwport.cpp:87
oscillator version 5.x, 8bit, two ranges
Definition: rwmem.h:181
IOReg< HWAcomp > acsr_reg
ACSR IO register.
Definition: hwacomp.h:82
IOReg< HWTimer8 > tcnt_reg
counter register
Definition: hwtimer.h:229
HWUSI_BR * usi
usi unit
GPIORegister * gpior2_reg
GPIOR2 Register.
A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets.
Definition: rwmem.h:113
TimerIRQRegister * timer01irq
timer interrupt unit for timer 0 and 1
Handler for external IRQ&#39;s to communicate with IRQ system and mask/flag registers.
Definition: externalirq.h:41
Represents a timer interrupt line, Frontend for timer interrupts.
Definition: timerirq.h:42
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
Definition: flashprog.cpp:246
GPIORegister * gpior1_reg
GPIOR1 Register.
IOReg< HWTimer8_2C > tccrb_reg
control register B
Definition: hwtimer.h:440
IOSpecialReg tifr_reg
the TIFRx register
Definition: timerirq.h:74
IOReg< HWPort > port_reg
Definition: hwport.h:84
void Reset()
Definition: avrdevice.cpp:390
HWARef * aref
adc reference unit
IOReg< HWPort > pin_reg
Definition: hwport.h:84
IOReg< HWTimer8_2C > tccra_reg
control register A
Definition: hwtimer.h:439
IOSpecialReg * pllcsr_reg
PLLCSR IO register.
HWTimerTinyX5 * timer1
timer 1 unit
TraceValueCoreRegister coreTraceGroup
Definition: avrdevice.h:108
AVR device class for ATTiny45, see AvrDevice_attinyX5.
timer unit for timer 1 on ATtiny25/45/85
Definition: hwtimer.h:778
IOReg< HWTimerTinyX5 > tccr_reg
control register
Definition: hwtimer.h:915
bool flagMULInstructions
(F)MULxx instructions are available
Definition: avrdevice.h:121
IOReg< HWEeprom > eearh_reg
Definition: hweeprom.h:101
HWPort portb
port B (only 6 bit)
HWAcomp * acomp
analog compare unit
ExternalIRQHandler * extirq
external interrupt support
AvrDevice_attinyX5(unsigned ram_bytes, unsigned flash_bytes, unsigned ee_bytes)
AVR device class for ATTiny25, see AvrDevice_attinyX5.
Pin * GetPin(const char *name)
Definition: avrdevice.cpp:76
IOSpecialReg * pcmsk_reg
PCMSK IO register.
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
Definition: timerirq.h:61
HWTimer8_2C * timer0
timer 0 unit
IOReg< HWEeprom > eecr_reg
Definition: hweeprom.h:101
HWAdmux * admux
adc multiplexer unit
HWEeprom * eeprom
Definition: avrdevice.h:102
IOReg< HWTimerTinyX5 > tcnt_reg
counter register
Definition: hwtimer.h:916
void registerLine(int idx, IRQLine *irq)
Definition: timerirq.cpp:88
AVR device class for ATTiny85, see AvrDevice_attinyX5.
#define AVR_REGISTER(name, class)
Definition: avrfactory.h:69
AVRDevice class for ATTiny25/45/85.
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
Definition: avrdevice.h:129
IOReg< HWUSI > usisr_reg
Definition: hwusi.h:168
ADC type T25: ADC on attiny25/45/85.
Definition: hwad.h:265
IOReg< HWUSI > usidr_reg
Definition: hwusi.h:168
IOReg< HWTimerTinyX5 > tocrc_reg
OCR register channel C.
Definition: hwtimer.h:919
IOReg< HWTimerTinyX5 > dt1b_reg
dead time generator register channel B
Definition: hwtimer.h:922
Provides the programming engine for flash self programming.
Definition: flashprog.h:38
IOReg< HWTimerTinyX5 > dtps1_reg
dead time generator prescaler register
Definition: hwtimer.h:920
HWAd * ad
adc unit
IOSpecialReg * gifr_reg
GIFR IO register.
IOReg< HWEeprom > eearl_reg
Definition: hweeprom.h:101
IOReg< HWTimer8 > ocra_reg
output compare A register
Definition: hwtimer.h:230
IOReg< HWTimerTinyX5 > tocra_reg
OCR register channel A.
Definition: hwtimer.h:917
HWStack * stack
Definition: avrdevice.h:131
RWSreg * statusRegister
the memory interface for status
Definition: avrdevice.h:133
Timer unit with 8Bit counter and 2 output compare unit.
Definition: hwtimer.h:416
IOReg< HWUSI_BR > usibr_reg
Definition: hwusi.h:201
Pin-change interrupt on all pins of a port.
Definition: externalirq.h:137
IRQLine * getLine(const std::string &name)
Definition: timerirq.cpp:109
void SetTimerEventListener(TimerEventListener *listener)
Set event listener.
Definition: hwtimer.h:91
Definition: hwad.h:204
IOReg< HWTimerTinyX5 > dt1a_reg
dead time generator register channel A
Definition: hwtimer.h:921
FlashProgramming * spmRegister
Definition: avrdevice.h:99
CLKPRRegister * clkpr_reg
CLKPR IO register.
IOReg< HWTimerTinyX5 > tocrb_reg
OCR register channel B.
Definition: hwtimer.h:918
IOReg< HWTimer8 > ocrb_reg
output compare B register
Definition: hwtimer.h:231
IOReg< HWPort > ddr_reg
Definition: hwport.h:84
IOSpecialReg timsk_reg
the TIMSKx register
Definition: timerirq.h:73
Analog comparator peripheral.
Definition: hwacomp.h:42
IOReg< FlashProgramming > spmcr_reg
Definition: flashprog.h:95
Implement OSCCAL register.
Definition: rwmem.h:174
IOSpecialReg * gimsk_reg
GIMSK IO register.
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
Definition: externalirq.h:110
GPIORegister * gpior0_reg
GPIOR0 Register.