µracoli Manual  Version foo
transceiver.h
1 /* Copyright (c) 2007 Axel Wachtler
2  All rights reserved.
3 
4  Redistribution and use in source and binary forms, with or without
5  modification, are permitted provided that the following conditions
6  are met:
7 
8  * Redistributions of source code must retain the above copyright
9  notice, this list of conditions and the following disclaimer.
10  * Redistributions in binary form must reproduce the above copyright
11  notice, this list of conditions and the following disclaimer in the
12  documentation and/or other materials provided with the distribution.
13  * Neither the name of the authors nor the names of its contributors
14  may be used to endorse or promote products derived from this software
15  without specific prior written permission.
16 
17  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  POSSIBILITY OF SUCH DAMAGE. */
28 
29 /* $Id$ */
35 #ifndef TRANSCEIVER_H
36 #define TRANSCEIVER_H
37 
43 /* === Includes ============================================================== */
44 #include "board.h"
45 
46 #if RADIO_TYPE == RADIO_AT86RF230 || defined(DOXYGEN)
47 # include "at86rf230a.h"
48 #elif RADIO_TYPE == RADIO_AT86RF230B
49 # include "at86rf230b.h"
50 #elif RADIO_TYPE == RADIO_AT86RF231
51 # include "at86rf231.h"
52 #elif RADIO_TYPE == RADIO_AT86RF212
53 # include "at86rf212.h"
54 #elif RADIO_TYPE == RADIO_AT86RF232
55 # include "at86rf232.h"
56 #elif RADIO_TYPE == RADIO_AT86RF233
57 # include "at86rf233.h"
58 #elif RADIO_TYPE == RADIO_ATMEGA128RFA1_A ||\
59  RADIO_TYPE == RADIO_ATMEGA128RFA1_B ||\
60  RADIO_TYPE == RADIO_ATMEGA128RFA1_C ||\
61  RADIO_TYPE == RADIO_ATMEGA128RFA1_D
62 # include "atmega_rfa1.h"
63 #elif RADIO_TYPE == RADIO_ATMEGA256RFR2 || RADIO_TYPE == RADIO_ATMEGA2564RFR2
64 # include "atmega_rfr2.h"
65 #else
66 # error "RADIO_TYPE is not defined or wrong"
67 #endif
68 #include <stdbool.h>
69 
70 /* === Externals ============================================================= */
71 
72 /* === Types ================================================================= */
73 
74 #if defined(DOXYGEN)
75 
76  /* this types are defined in at86rfXXX.{h,txt} in order
77  to provide a radio abstraction */
78 
81  typedef uint8_t trx_ramaddr_t;
82 
85  typedef uint8_t trx_regval_t;
86 
89  typedef uint8_t trx_regaddr_t;
90 
91 #endif
92 
95 typedef void (*trx_irq_handler_t)(uint8_t cause);
96 
97 typedef enum
98 {
99  CFG_FLASH,
100  CFG_EEPROM,
101  CFG_NONE
102 } trx_cfg_t;
103 
104 /* === Macros ================================================================ */
105 /* error codes */
107 #define TRX_OK (0)
108 
109 #define TRX_INIT_FAIL (1)
110 
111 #define TRX_PLL_FAIL (2)
112 
113 #define INVALID_PART_NUM (2)
114 #define INVALID_REV_NUM (1)
116 /* Data Rate macros, generated by python Tools/cmdhash.py `cat rates.txt` */
117 #define BPSK20 (0x52)
118 #define BPSK20_STR "BPSK20"
119 #define BPSK40 (0x92)
120 #define BPSK40_STR "BPSK40"
121 #define OQPSK100 (0x90)
122 #define OQPSK100_STR "OQPSK100"
123 #define OQPSK200 (0x93)
124 #define OQPSK200_STR "OQPSK200"
125 #define OQPSK250 (0x33)
126 #define OQPSK250_STR "OQPSK250"
127 #define OQPSK400 (0x95)
128 #define OQPSK400_STR "OQPSK400"
129 #define OQPSK500 (0x94)
130 #define OQPSK500_STR "OQPSK500"
131 #define OQPSK1000 (0x34)
132 #define OQPSK1000_STR "OQPSK1000"
133 #define OQPSK2000 (0x54)
134 #define OQPSK2000_STR "OQPSK2000"
135 
136 #define RATE_NONE (0xFF)
137 
139 #ifndef MAX_FRAME_SIZE
140 # define MAX_FRAME_SIZE (127)
141 #endif
142 
143 /* channel handling */
144 #define TRX_NEXT_CHANNEL(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MAX_CHANNEL : x+1)
145 #define TRX_PREV_CHANNEL(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MIN_CHANNEL : x-1)
146 #define TRX_NEXT_CHANNEL_WRAP(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MIN_CHANNEL : x+1 )
147 #define TRX_PREV_CHANNEL_WRAP(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MAX_CHANNEL : x-1 )
148 
149 
150 #if defined (SR_MASK_AMI) || defined(DOXYGEN)
151 
152 # define TRX_IRQ_AMI_EI() trx_bit_write(SR_MASK_AMI, 1);
153 
154 # define TRX_IRQ_AMI_DI() trx_bit_write(SR_MASK_AMI, 0);
155 #endif
156 
157 #if defined (SR_MASK_BAT_LOW) || defined(DOXYGEN)
158 
159 # define TRX_IRQ_BAT_LOW_EI() trx_bit_write(SR_MASK_BAT_LOW, 1);
160 
161 # define TRX_IRQ_BAT_LOW_DI() trx_bit_write(SR_MASK_BAT_LOW, 0);
162 #endif
163 
164 #if defined (SR_MASK_CCA_ED_READY) || defined(DOXYGEN)
165 
166 # define TRX_IRQ_CCA_ED_READY_EI() trx_bit_write(SR_MASK_CCA_ED_READY, 1);
167 
168 # define TRX_IRQ_CCA_ED_READY_DI() trx_bit_write(SR_MASK_CCA_ED_READY, 0);
169 #endif
170 
171 #if defined (SR_MASK_PLL_UNLOCK) || defined(DOXYGEN)
172 
173 # define TRX_IRQ_PLL_UNLOCK_EI() trx_bit_write(SR_MASK_PLL_UNLOCK, 1);
174 
175 # define TRX_IRQ_PLL_UNLOCK_DI() trx_bit_write(SR_MASK_PLL_UNLOCK, 0);
176 #endif
177 
178 #if defined (SR_MASK_RX_START) || defined(DOXYGEN)
179 
180 # define TRX_IRQ_RX_START_EI() trx_bit_write(SR_MASK_RX_START, 1);
181 
182 # define TRX_IRQ_RX_START_DI() trx_bit_write(SR_MASK_RX_START, 0);
183 #endif
184 
185 #if defined (SR_MASK_TRX_IRQ_END) || defined(DOXYGEN)
186 
187 # define TRX_IRQ_TRX_IRQ_END_EI() trx_bit_write(SR_MASK_TRX_IRQ_END, 1);
188 
189 # define TRX_IRQ_TRX_IRQ_END_DI() trx_bit_write(SR_MASK_TRX_IRQ_END, 0);
190 #endif
191 
192 #if defined (SR_MASK_TRX_IRQ_START) || defined(DOXYGEN)
193 
194 # define TRX_IRQ_TRX_IRQ_START_EI() trx_bit_write(SR_MASK_TRX_IRQ_START, 1);
195 
196 # define TRX_IRQ_TRX_IRQ_START_DI() trx_bit_write(SR_MASK_TRX_IRQ_START, 0);
197 #endif
198 
199 #if defined (SR_MASK_UR) || defined(DOXYGEN)
200 
201 # define TRX_IRQ_UR_EI() trx_bit_write(SR_MASK_UR, 1);
202 
203 # define TRX_IRQ_UR_DI() trx_bit_write(SR_MASK_UR, 0);
204 #endif
205 
206 /* === Prototypes ============================================================ */
207 #ifdef __cplusplus
208 extern "C" {
209 #endif
210 
219 void trx_io_init (uint8_t spirate);
220 
221 
224 void trx_set_irq_handler(trx_irq_handler_t irqhandler);
225 
234 
243 uint8_t trx_reg_read(trx_regaddr_t addr);
244 
245 
246 
262 trx_regval_t trx_bit_read(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos);
263 
264 
281 void trx_bit_write(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos, trx_regval_t value);
282 
293 void trx_frame_write(uint8_t length, uint8_t *data);
294 
306 uint8_t trx_frame_read(uint8_t *data, uint8_t datasz, uint8_t *lqi);
307 
308 
325 uint8_t trx_frame_read_crc(uint8_t *data, uint8_t datasz, bool *crc_ok);
326 
327 
345 uint8_t trx_frame_read_data_crc(uint8_t *data, uint8_t datasz, uint8_t *lqi, bool *crc_ok);
346 
354 uint8_t trx_frame_get_length(void);
355 
366 void trx_sram_write(trx_ramaddr_t addr, uint8_t length, uint8_t *data);
367 
376 void trx_sram_read(trx_ramaddr_t addr, uint8_t length, uint8_t *data);
377 
387 void trx_parms_get(trx_param_t *p);
388 
401 uint8_t trx_parms_set(trx_param_t *p);
402 
414 uint8_t trx_set_datarate(uint8_t rate_type);
415 
420 uint8_t trx_get_datarate(void);
421 
426 uint8_t trx_get_number_datarates(void);
427 
438 void * trx_get_datarate_str_p(uint8_t idx);
439 
446 void * trx_decode_datarate_p(uint8_t rhash);
447 
457 uint8_t trx_get_datarate_str(uint8_t idx, char * rstr, uint8_t nlen);
458 
468 uint8_t trx_decode_datarate(uint8_t rhash, char * rstr, uint8_t nlen);
469 
470 /*=== Inline Functions ================================================*/
471 /*
472  * This are functions that are usually called once in an application,
473  * so we decalre it inline here
474  */
475 
479 static inline uint8_t trx_init(void)
480 {
481 uint8_t val;
482 
483  /* reset transceiver */
484  TRX_RESET_LOW();
485  TRX_SLPTR_LOW();
486  DELAY_US(TRX_RESET_TIME_US);
487  TRX_RESET_HIGH();
488 
489  /* set TRX_OFF (for the case we come from P_ON) */
490  trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
491  DELAY_US(TRX_INIT_TIME_US);
492  val = trx_reg_read(RG_TRX_STATUS);
493  return (val != TRX_OFF) ? TRX_OK : TRX_INIT_FAIL;
494 }
495 
496 
497 static inline uint8_t trx_check_pll_lock(void)
498 {
499 uint8_t val, cnt = 255;
500 
501  trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
502  trx_reg_write(RG_IRQ_MASK, TRX_IRQ_PLL_LOCK);
503  trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
504  cnt = 255;
505  do
506  {
507  DELAY_US(TRX_PLL_LOCK_TIME_US);
508  val = trx_reg_read(RG_IRQ_STATUS);
509  if (val & TRX_IRQ_PLL_LOCK)
510  {
511  break;
512  }
513  }
514  while(--cnt);
515 
516  /* clear pending IRQs*/
517  trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
518  trx_reg_read(RG_IRQ_STATUS);
519  return (cnt > 0) ? TRX_OK : TRX_PLL_FAIL;
520 }
521 
522 
532 static inline int trx_identify(void)
533 {
534  int ret = 0;
535 
536  if(RADIO_PART_NUM != trx_reg_read(RG_PART_NUM))
537  {
538  ret |= INVALID_PART_NUM;
539  }
540 
541  if(RADIO_VERSION_NUM != trx_reg_read(RG_VERSION_NUM))
542  {
543  ret |= INVALID_REV_NUM;
544  }
545  return ret;
546 }
547 
551 static inline void trx_set_panid(uint16_t panid)
552 {
553  trx_reg_write(RG_PAN_ID_0,(panid&0xff));
554  trx_reg_write(RG_PAN_ID_1,(panid>>8));
555 }
556 
561 static inline void trx_set_shortaddr(uint16_t shortaddr)
562 {
563  trx_reg_write(RG_SHORT_ADDR_0,(shortaddr&0xff));
564  trx_reg_write(RG_SHORT_ADDR_1,(shortaddr>>8));
565 }
566 
571 static inline void trx_set_longaddr(uint64_t longaddr)
572 {
573  trx_reg_write(RG_IEEE_ADDR_0, (uint8_t)(longaddr>>0) );
574  trx_reg_write(RG_IEEE_ADDR_1, (uint8_t)(longaddr>>8) );
575  trx_reg_write(RG_IEEE_ADDR_2, (uint8_t)(longaddr>>16));
576  trx_reg_write(RG_IEEE_ADDR_3, (uint8_t)(longaddr>>24));
577  trx_reg_write(RG_IEEE_ADDR_4, (uint8_t)(longaddr>>32));
578  trx_reg_write(RG_IEEE_ADDR_5, (uint8_t)(longaddr>>40));
579  trx_reg_write(RG_IEEE_ADDR_6, (uint8_t)(longaddr>>48));
580  trx_reg_write(RG_IEEE_ADDR_7, (uint8_t)(longaddr>>56));
581 }
582 
583 /* todo add and test a fucntion for setting the ext address */
584 
585 #ifdef __cplusplus
586 } /* extern "C" */
587 #endif
588 
592 #endif /* TRANSCEIVER_H */
void trx_sram_write(trx_ramaddr_t addr, uint8_t length, uint8_t *data)
Write SRAM.
#define TRX_SLPTR_LOW()
Definition: board.h:178
uint8_t trx_get_datarate_str(uint8_t idx, char *rstr, uint8_t nlen)
return a copy of a data rate in a buffer.
void trx_set_irq_handler(trx_irq_handler_t irqhandler)
void trx_parms_get(trx_param_t *p)
Get static transceiver parameters.
void trx_sram_read(trx_ramaddr_t addr, uint8_t length, uint8_t *data)
Read SRAM.
#define DELAY_US(x)
Macro for delays with us resolution.
Definition: board.h:89
static int trx_identify(void)
Verify that correct radio type is used.
Definition: transceiver.h:532
#define INVALID_REV_NUM
Definition: transceiver.h:114
uint8_t trx_set_datarate(uint8_t rate_type)
set data rate
uint8_t trx_frame_read_crc(uint8_t *data, uint8_t datasz, bool *crc_ok)
Frame Read with CRC check (and crc value kept)
void trx_frame_write(uint8_t length, uint8_t *data)
Frame Write.
void * trx_decode_datarate_p(uint8_t rhash)
Decodes a hash value and returns a datarate string pointer in program memory.
void trx_bit_write(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos, trx_regval_t value)
subregister write
#define TRX_OK
Definition: transceiver.h:107
static uint8_t trx_init(void)
Basic radio initialization function,.
Definition: transceiver.h:479
static void trx_set_panid(uint16_t panid)
Write the PANID to the address filter registers.
Definition: transceiver.h:551
uint8_t trx_get_number_datarates(void)
return the number of supported data rates.
uint8_t trx_parms_set(trx_param_t *p)
Set static transceiver parameters.
#define TRX_PLL_FAIL
Definition: transceiver.h:111
void * trx_get_datarate_str_p(uint8_t idx)
return a pointer to a datarate string in the programm memory.
#define TRX_RESET_HIGH()
Definition: board.h:158
void trx_io_init(uint8_t spirate)
Transceiver IO initialization (SPI, RF Frontend if applicable)
uint8_t trx_decode_datarate(uint8_t rhash, char *rstr, uint8_t nlen)
Decodes a hash value and returns a datarate string pointer.
uint8_t trx_reg_read(trx_regaddr_t addr)
Read Register.
uint8_t trx_get_datarate(void)
get current adjusted data rate.
#define INVALID_PART_NUM
Definition: transceiver.h:113
uint8_t trx_regaddr_t
Definition: transceiver.h:89
static void trx_set_longaddr(uint64_t longaddr)
Write the 64 bit long address (MAC address) to the address filter registers.
Definition: transceiver.h:571
trx_regval_t trx_bit_read(trx_regaddr_t addr, trx_regval_t mask, uint8_t pos)
subregister read
uint8_t trx_frame_read_data_crc(uint8_t *data, uint8_t datasz, uint8_t *lqi, bool *crc_ok)
Frame Read with CRC check (and crc value suppressed)
uint8_t trx_regval_t
Definition: transceiver.h:85
uint8_t trx_ramaddr_t
Definition: transceiver.h:81
void trx_reg_write(trx_regaddr_t addr, trx_regval_t val)
Write Register.
static void trx_set_shortaddr(uint16_t shortaddr)
Write the 16 bit short address to the address filter registers.
Definition: transceiver.h:561
void(* trx_irq_handler_t)(uint8_t cause)
Definition: transceiver.h:95
uint8_t trx_frame_get_length(void)
Get length of a received frame.
uint8_t trx_frame_read(uint8_t *data, uint8_t datasz, uint8_t *lqi)
Frame Read.
#define TRX_RESET_LOW()
Definition: board.h:163
#define TRX_INIT_FAIL
Definition: transceiver.h:109